1. Technical Field
Various embodiments generally relate to a semiconductor integrated circuit device, and more particularly, to a semiconductor integrated circuit device including a negative bias temperature instability (NBTI) compensating circuit.
2. Related Art
Generally, when a high electric field is applied to a gate of each of PMOS transistors in a semiconductor memory device, a negative bias used in the semiconductor memory device may become unstable because of temperature changes. This may be referred to as a negative bias temperature instability (NBTI). The NBTI may cause an increase in a threshold voltage of the PMOS transistor so that capacities of the semiconductor memory device may deteriorate. As a result, malfunctions may generate from an inverter to which the PMOS transistor may be applied.